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Search : "[ author: Kwang-sub Yoon ]" (12)
Design of a 10Bit Comparison Register A/D Converter with 2Bit/Step and Threshold Configuring Comparator
Sang-Heon Lee  Ho-Yong Lee  Kwang-Sub Yoon
Vol. 42, No. 9, pp. 1719-1725, Sep. 2017
10.7840/kics.2017.42.9.1719
Mode Control Design of Dual Buck Converter Using Variable Frequency to Voltage Converter
Tae-Heon Lee  Jong-Gu Kim  Jin-Woo So  Kwang-Sub Yoon
Vol. 42, No. 4, pp. 864-870, Apr. 2017

Design of PFM Boost Converter with Dual Pulse Width Control
Ji-San Choi  Yong-Min Jo  Tae-Heon Lee  Kwang-Sub Yoon
Vol. 40, No. 9, pp. 1693-1698, Sep. 2015

Design of a Low Power 10bit Flash SAR A/D Converter
Gi-Yoon Lee  Jeong-Heum Kim  Kwang-Sub Yoon
Vol. 40, No. 4, pp. 613-618, Apr. 2015

Design of a CMOS Single Bit 3rd Order Delta-Sigma Modulator with Switched Operational Amplifier
Han-Ul Lee  Shi Dai  Tai-kyung Yoo  Keon Lee  Kwang-Sub Yoon 
Sang-Min Lee
Vol. 37, No. 8, pp. 712-719, Aug. 2012

Design of the DC-DC Buck Converter for Mobile Application Using PWM/PFM Mode
Li-Min Park  Hak-Jin Jung  Tai-Kyung Yoo  Kwang-Sub Yoon
Vol. 35, No. 11, pp. 1667-1675, Nov. 2010

Design of a 6bit 800MS/s CMOS A/D Converter Using Synchronizable Error Correction Circuit
Won Kim  Jong-kug Seon  Kwang-sub Yoon
Vol. 35, No. 5, pp. 504-512, May   2010

Design of monolithic DC-DC Buck converter with on chip soft-start circuit
Seung-chan Park  Dong-Kyun Lim  Sang-min Lee  Kwang-sub Yoon
Vol. 34, No. 7, pp. 568-573, Jul. 2009

Design of 6bit CMOS A/D Converter with Simplified S-R latch
Young-jun Son  Won Kim  Kwang-sub Yoon
Vol. 33, No. 11, pp. 963-969, Nov. 2008

An I/Q Channel 12bit 40MS/s Pipeline A/D Converter with DLL Based Duty-Correction Circuit for WLAN
Jae-yong Lee  Sung-il Cho  Hyun-mook Park  Sang-min Lee  Kwang-sub Yoon

Vol. 33, No. 5, pp. 395-402, May   2008

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pISSN : 1226 - 4717
eISSN : 2287 - 3880